PC:$0800
A:$00
X:$00
Y:$00
SP:$FF
Flags:
N
V
-
B
D
I
Z
C
Instr:
-
Write assembly code, step through instructions, and watch the CPU registers change in real-time.
Load Assembly Sample:
6502 Assembly Quick Start
The 6502 is an 8-bit processor with three registers: A (accumulator), X and Y (index registers). Assembly instructions are 1-3 bytes.
Load & Store
LDA— Load into A
LDA #$05(immediate)
LDA $D020(absolute)LDX/LDY— Load into X/YSTA/STX/STY— Store to memory
Arithmetic
ADC— Add with carry
CLCthenADC #$10SBC— Subtract with borrow
SECthenSBC #$01INC/DEC— Increment/decrement memoryINX/DEX/INY/DEY— Inc/dec registers
Logic & Shifts
AND/ORA/EOR— Bitwise AND/OR/XORASL/LSR— Shift left/rightROL/ROR— Rotate through carry
Compare & Branch
CMP/CPX/CPY— Compare (sets flags)BEQ/BNE— Branch if equal/not equalBCC/BCS— Branch if carry clear/setBMI/BPL— Branch if minus/plus
Subroutines & Stack
JSR— Jump to subroutine
Pushes return address (PC+2) to stack, then jumpsRTS— Return from subroutine
Pops address from stack, jumps to address+1PHA/PLA— Push/pull A to stackPHP/PLP— Push/pull flags to stack
Stack lives at $0100-$01FF, grows downward. SP starts at $FF.
Common Patterns
; Loop 10 times LDX #$0A loop: DEX BNE loop RTS
Interrupts
Interrupts pause the CPU to run a handler routine, then resume — used for timing, keyboard, and raster effects.
SEI— Disable interrupts (set I flag)CLI— Enable interrupts (clear I flag)RTI— Return from interrupt
IRQ vector at $0314-$0315 (KERNAL), hardware at $FFFE.
CIA Timer (IRQ)
$DC04/$DC05— Timer A latch (lo/hi)$DC0D— Interrupt control
Write#$81to enable Timer A IRQ
Write#$7Fto disable all IRQs$DC0E— Control register A
Bit 0: Start timer, Bit 3: One-shot mode
VIC-II Raster IRQ
$D012— Raster line (bits 0-7)$D011— Bit 7 = raster line bit 8$D019— IRQ status (write#$01to ack)$D01A— IRQ enable (bit 0 = raster)
Raster IRQ Setup
SEI LDA #$7F STA $DC0D ; Disable CIA IRQ LDA #$32 STA $D012 ; Raster line 50 LDA #$01 STA $D01A ; Enable raster IRQ LDA #<handler STA $0314 LDA #>handler STA $0315 CLI