BUS SIMULATION

Address Bus (Request) Data Bus (Payload)

SCENARIOS

Choose a scenario. Each one is recorded from the emulated C64 as it runs, then played back one bus access at a time.

HOW IT WORKS

One bus, many chips: the CPU and the VIC-II share one 16-bit address bus and one 8-bit data bus. Every chip is wired to them, but only one answers each access.

Red dots (address bus): where the CPU or VIC-II wants to read or write.

Yellow dots (data bus): the byte that moves: from the chip on a read, to it on a write.

The PLA decides: it lights up on every access because it turns the address, and the banking bits, into the one chip select that makes ROM, RAM or a chip answer.

COMMODORE 64 HARDWARE

The C64C motherboard with key chips labeled. The C64's architecture is elegantly simple yet powerful.

Annotated C64C Motherboard showing chip locations

CHIP REFERENCE

CPU

The brain of the C64. An enhanced 6502 with built-in I/O port for bank switching.

  • Part: 6510 / 8500
  • Clock: ~1 MHz
  • Address Bus: 16-bit (64KB)
  • Data Bus: 8-bit

VIC-II

Handles all graphics: sprites, characters, bitmaps. Can steal bus cycles from CPU.

  • Part: 6569 / 8565 (PAL), 6567 / 8562 (NTSC)
  • Resolution: 320×200 / 160×200
  • Colors: 16
  • Sprites: 8 hardware

SID

The legendary sound chip that made C64 music famous worldwide.

  • Part: 6581 (12V) / 8580 (9V)
  • Voices: 3 independent
  • Waveforms: 4 types
  • Filters: Programmable

CIA 1

Complex Interface Adapter handling keyboard scanning and joystick ports.

  • Part: 6526 / 8521
  • Function: Keyboard/Joystick
  • Timers: 2 × 16-bit
  • I/O Ports: 2 × 8-bit

CIA 2

Second CIA chip controlling serial bus, user port, and VIC bank selection.

  • Part: 6526 / 8521
  • Function: Serial/User port
  • VIC Bank: Selects 16KB bank
  • Timers: 2 × 16-bit

PLA

The Programmable Logic Array: the traffic controller that turns every address, plus the CPU's banking bits, into the chip select that makes ROM, RAM or one of the chips answer.

  • Part: 906114-01 PLA / 252535-01 SuperPLA (C64C)
  • Function: Address decode
  • Controls: Bank switching
  • Note: The original PLA runs hot and often fails

ROM

The KERNAL operating system and the BASIC interpreter, in one 16 KB chip on the C64C. The character shapes live in a separate 4 KB character ROM.

  • Part: 251913-01 BASIC + KERNAL (C64C)
  • KERNAL: 8 KB ($E000-$FFFF)
  • BASIC: 8 KB ($A000-$BFFF)
  • Characters: 901225-01, 4 KB ($D000-$DFFF when banked in)

RAM

Two 4464 chips (64K × 4 bits each) make 64 KB together: each stores four of the eight bits of every byte. The CPU and VIC-II take turns using them.

  • Part: 4464 × 2 (C64C)
  • Size: 64 KB total
  • Type: Dynamic RAM
  • Shared: CPU & VIC-II